Computer Architecture MCQ Multiple Choice Questions - Page 2 for Practice

Q: 31. The multiplier is stored in

Correct Answer is: Shift register

Q: 33. The operation executed on data stored in registers is called

Correct Answer is: Bit operation

Q: 35. The ROM chips are mainly used to store

Correct Answer is: System files

Q: 40. The special memory used to store the micro routines of a computer is

Correct Answer is: Control store

Q: 41. The stack frame for each subroutine is present in

Correct Answer is: Processor Stack

Q: 42. The stalling of the processor due to the unavailability of the instructions is called as

Correct Answer is: None of the mentioned

Q: 43. The status bit is also called as

Correct Answer is: Unsigned bit

Q: 44. The system is notified of a read or write operation by

Correct Answer is: Appending an extra bit of the address

Q: 46. The transfer of large chunks of data with the involvement of the processor is done by

Correct Answer is: DMA controller

Q: 47. The two phases of executing an instruction are

Correct Answer is: Instruction fetch and instruction execution

31. The multiplier is stored in

PC Register
Shift register
Cache
None of the mentioned

32. The next level of memory hierarchy after the L2 cache is

Secondary storage
TLB
Main memory
Register

33. The operation executed on data stored in registers is called

Micro operation
Bit operation
macro operation
Byte operation

34. The periods of time when the unit is idle is called as

Stalls
Bubbles
Hazards
Both Stalls and Bubbles

35. The ROM chips are mainly used to store

System files
Root directories
Boot files
Driver files

36. The sign followed by the string of digits is called as

Significant
Determinant
Mantissa
Exponent

37. The situation wherein the data of operands are not available is called

Data hazard
Stock
Deadlock
Structural hazard

38. The small extremely fast RAM is called as

Cache
Heaps
Accumulators
Stacks

39. The smallest entity of memory is called

Cell
Block
Instance
Unit

40. The special memory used to store the micro routines of a computer is

Control table
Control store
Control mart
Control shop

41. The stack frame for each subroutine is present in

Main memory
System Heap
Processor Stack
None of the mentioned

42. The stalling of the processor due to the unavailability of the instructions is called as

Control hazard
structural hazard
Input hazard
None of the mentioned

43. The status bit is also called as

Unsigned bit
Signed bit
Flag bit
None of the above

44. The system is notified of a read or write operation by

Appending an extra bit of the address
Enabling the read or write bits of the devices
Raising an appropriate interrupt signal
Sending a special signal along the BUS

45. The time interval between adjacent bits is called the

Word time
Turnaround time
Bit time
slice time

46. The transfer of large chunks of data with the involvement of the processor is done by

DMA controller
Arbitrator
User system programs
None of the mentioned

47. The two phases of executing an instruction are

Instruction decoding and storage
Instruction fetch and instruction execution
Instruction execution and storage
Instruction fetch and Instruction processing

48. The type of memory assignment used in Intel processors is

Little Endian
Big Endian
Medium Endian
None of the mentioned

49. The unit which acts as an intermediate agent between memory and backing store to reduce process time is

TLB's
Registers
Page tables
Cache

50. The usual BUS structure used to connect the I/O devices is

Star BUS structure
Multiple BUS structure
Single BUS structure
Node to Node BUS structure

51. The............is used to coordinate the operation of the multiplier.

Controller
Coordinator
Control sequencer
None of the mentioned

52. To get the physical address from the logical address generated by CPU we use

MAR
MMU
Overlays
TLB

53. To organize large memory chips we make use of

Integrated chips
Upgraded hardware
Memory modules
None of the mentioned

54. We make use of..........circuits to implement multiplication.

Flip flops
Combinatorial
Fast adders
None of the mentioned

55. What does a computer bus line consists of?

Set of parallel lines
Accumulators
Registers
None of the above

56. When using Branching, the usual sequencing of the PC is altered. A new instruction is loaded which is called as

Branch target
Loop target
Forward target
Jump instruction

57. When using the Big Endian assignment to store a number, the sign bit of the number is stored in

The higher order byte of the word
The lower order byte of the word
Can't say
None of the mentioned

58. Where is the document temporarily stored during working on a document on PC?

ROM
CPU
RAM
Flash memory

59. Which of the architecture is power efficient?

CISC
RISC
ISA
IANA

60. Which of the following building block can be used to implement any combinational logic circuit?

AND
OR
NAND
None of the above