Computer Architecture MCQ Multiple Choice Questions - Page 2 for Practice

Computer Architecture MCQ Questions for Practice

31. The multiplier is stored in

32. The next level of memory hierarchy after the L2 cache is

33. The operation executed on data stored in registers is called

34. The periods of time when the unit is idle is called as

35. The ROM chips are mainly used to store

36. The sign followed by the string of digits is called as

37. The situation wherein the data of operands are not available is called

38. The small extremely fast RAM is called as

39. The smallest entity of memory is called

40. The special memory used to store the micro routines of a computer is

41. The stack frame for each subroutine is present in

42. The stalling of the processor due to the unavailability of the instructions is called as

43. The status bit is also called as

44. The system is notified of a read or write operation by

45. The time interval between adjacent bits is called the

46. The transfer of large chunks of data with the involvement of the processor is done by

47. The two phases of executing an instruction are

48. The type of memory assignment used in Intel processors is

49. The unit which acts as an intermediate agent between memory and backing store to reduce process time is

50. The usual BUS structure used to connect the I/O devices is

51. The............is used to coordinate the operation of the multiplier.

52. To get the physical address from the logical address generated by CPU we use

53. To organize large memory chips we make use of

54. We make use of..........circuits to implement multiplication.

55. What does a computer bus line consists of?

56. When using Branching, the usual sequencing of the PC is altered. A new instruction is loaded which is called as

57. When using the Big Endian assignment to store a number, the sign bit of the number is stored in

58. Where is the document temporarily stored during working on a document on PC?

59. Which of the architecture is power efficient?

60. Which of the following building block can be used to implement any combinational logic circuit?

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Multiple Choice Questions and Answers on Computer Architecture

Computer Architecture Multiple Choice Questions and Answers

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