ARM Processor Architecture Objective Question and Answer
ARM Processor Architecture MCQ Multiple Choice Questions - Page 4 for Practice
91. State whether the following statement is either true or false. We can represent any number in more than one normalized notation.
Correct Answer is: False Statement
92. Status of Z flag after the execution of CMP instruction given below, when R0 = 12; R9 = 12; is CMP R0, R9
Correct Answer is: Z = 1
93. The amount of time required to read a block of data from a disk into memory is composed of seek time, rotational latency, and transfer time. Rotational latency refers to
Correct Answer is: the time it takes for the platter to make a full rotation
94. The average time required to reach a storage location in memory and obtain its contents is called
Correct Answer is: Access time
95. The fastest data access is provided using
Correct Answer is: Registers
96. The idea of cache memory exploits the following property of programs
Correct Answer is: Principle of locality
97. The L1 cache is typically split into.........and...........cache for the pipelined system
Correct Answer is: Instruction, Data
98. The Logical Instructions are: ORR, EOR, TEQ, AND, TST, BIC, MOV, MVN Why is the V flag unaffected by the logical data processing instructions?
Correct Answer is: V flag is relevant only when an Arithmetic operation is performed
99. The main advantage of multiple bus organization over the single bus is
Correct Answer is: Reduction in the number of cycles for execution
100. The MCLK speed can be reduced to allow access to
