VLSI Design MCQ Quiz - Multiple Choice Questions & Answers Page 5

41. The abbreviation TTL means

1. transistor-transceiver latch.
2. three-transistor logic.
3. two-transistor logic.
4. transistor-transistor logic.

42. The CMOS series that is pin compatible with the TTL family is the

1. 74C00 series.
2. 4000 series.
3. 5400 series.
4. 7400 series.

43. The difference between VOH and VIH voltages is known as

1. input margin.
2. noise margin.
3. output differential.
4. input level.

44. The input transistor (Q 1) of a TTL gate acts like

1. a NAND gate.
2. a NOR gate.
3. an AND gate.
4. an OR gate.

45. The input transistor on a TTL circuit is unusual in that it has

1. multiple bases.
2. no collector
3. no base
4. multiple emitters.

46. The lower transistor of a totem-pole output is OFF when the gate output is

1. HIGH.
2. malfunctioning.
3. LOW.
4. over driven.

47. The lower transistor of a totem-pole output is saturated when the gate output is

1. HIGH.
2. LOW.
3. malfunctioning.
4. over driven.

48. The major advantage of CMOS logic circuits over TTL is

1. very low power consumption.
2. the ability to produce several output voltage levels.
3. lower propagation delay.
4. much higher propagation delay.

49. The major advantage of TTL logic circuits over CMOS is

1. lower propagation delay.
2. the ability to output higher voltages.
3. more modern design.
4. very low power consumption.

50. The maximum current for a HIGH output on a standard TTL gate is

1. -10 µA.
2. -400 µA.
3. -1 µA.
4. -10 mA.