VLSI Design MCQ Multiple Choice Questions Answers - Page 3 for Practice

Q: 61. Which alteration is made in the manufacture of a TTL gate to create an open-collector output?

Correct Answer is: The top output transistor is missing.

Q: 62. Which of the following are not characteristics of TTL logic gates?

Correct Answer is: CMOS transistors

Q: 64. Which of the following is a concern when using CMOS type devices?

Correct Answer is: electrostatic discharge

Q: 69. Which of the following is not a solution to interface problems between CMOS and TTL?

Correct Answer is: pull-down resistor

Q: 71. Which of the following output levels would be a valid HIGH for a TTL gate?

Correct Answer is: All are valid.

Q: 72. Which of the following output levels would not be a valid LOW for a TTL gate?

Correct Answer is: All are valid.

Q: 73. Which potential problem must be overcome when interfacing TTL to CMOS?

Correct Answer is: The HIGH output voltage may be too low.

Q: 74. Which specialized device distinguishes the 74LSXX circuits from standard 74XX circuits?

Correct Answer is: a Schottky diode

61. Which alteration is made in the manufacture of a TTL gate to create an open-collector output?

The output transistors are replaced by diodes.
The input transistor is replaced by a diode.
The output transistors are missing.
The top output transistor is missing.

62. Which of the following are not characteristics of TTL logic gates?

Totem-pole output
Bipolar transistors
CMOS transistors
Multiemitter transistors

63. Which of the following input levels would not be a valid HIGH for a TTL gate?

2.4 V
2.1 V
1.8 V
All are valid.

64. Which of the following is a concern when using CMOS type devices?

mechanical shock
electrostatic discharge
fan out
under voltage

65. Which of the following is a special type of transistor used in the TTL series to improve speed characteristics?

Belrus
Shockley
Brattain
Schottky

66. When setting the voltage for an external device that must interface with an FPGA, you must change the value of

VCCIO
VDDIN
VDDiO
VCCIN

67. Which of the following digital IC logic families is most susceptible to static discharge?

68. Which of the following is not a common logic family used today?

RTL
ECL
TTL
CMOS

69. Which of the following is not a solution to interface problems between CMOS and TTL?

pull-up resistor
pull-down resistor
level-shifter
buffer

70. Which of the following levels would not be a valid LOW for a TTL gate?

0.1 V
0.7 V
1.0 V
All are valid.

71. Which of the following output levels would be a valid HIGH for a TTL gate?

3.0 V
2.6 V
5.1 V
All are valid.

72. Which of the following output levels would not be a valid LOW for a TTL gate?

0.3 V
0.5 V
0.2 V
All are valid.

73. Which potential problem must be overcome when interfacing TTL to CMOS?

The HIGH output voltage may be too low.
The LOW output voltage may be too high.
The HIGH output voltage may be too high.
The output current may not be sufficient.

74. Which specialized device distinguishes the 74LSXX circuits from standard 74XX circuits?

a Schottky diode
a CMOS transistor
a multiemitter transistor
totem-pole output transistor