VLSI Design MCQ Quiz - Multiple Choice Questions & Answers Page 2

11. Which of the following input levels would not be a valid HIGH for a TTL gate?

1. 2.4 V
2. 2.1 V
3. 1.8 V
4. All are valid.

12. Which of the following is a concern when using CMOS type devices?

1. mechanical shock
2. electrostatic discharge
3. fan out
4. under voltage

13. Which of the following is a special type of transistor used in the TTL series to improve speed characteristics?

1. Belrus
2. Shockley
3. Brattain
4. Schottky

14. When setting the voltage for an external device that must interface with an FPGA, you must change the value of

1. VCCIO
2. VDDIN
3. VDDiO
4. VCCIN

15. Which of the following digital IC logic families is most susceptible to static discharge?

1. RTL
2. ECL
3. MOS
4. TTL

16. Which of the following is not a common logic family used today?

1. RTL
2. ECL
3. TTL
4. CMOS

17. Which of the following is not a solution to interface problems between CMOS and TTL?

1. pull-up resistor
2. pull-down resistor
3. level-shifter
4. buffer

18. Which of the following levels would not be a valid LOW for a TTL gate?

1. 0.1 V
2. 0.7 V
3. 1.0 V
4. All are valid.

19. Which of the following output levels would be a valid HIGH for a TTL gate?

1. 3.0 V
2. 2.6 V
3. 5.1 V
4. All are valid.

20. Which of the following output levels would not be a valid LOW for a TTL gate?

1. 0.3 V
2. 0.5 V
3. 0.2 V
4. All are valid.