Parallel Processing MCQ Multiple Choice Questions - Page 3 for Practice

61. The expression delayed load is used in context of

62. The iconic feature of the RISC machine among the following are

63. The maximum integer which can be stored on a 8 bit accumulator is

64. The most common addressing techiniques employed by a CPU is

65. The output of a gate is low when at least one of its input is low . It is true forA

66. The RISC processor has a more complicated design than CISC.

67. The Sun micro systems processors usually follow..................architecture.

68. The ultimate goal of a compiler is to,

69. The word size of the microprocessor refers to

70. To provide increased memory capacity for operating system, the

71. To which class of systems does the von Neumann computer belong?

72. Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B an execute with an average of 5 steps. For the execution of the same instruction which processor is faster ?

73. What is characteristic for the organization of a computer architecture?

74. What is meant by a dedicated computer?

75. What is stored in a Translation Lookaside Buffer?

76. What is the control units function in the CPU?

77. What is the minimum number of flip-flops required in a counter to count 100 pulses?A

78. What is usually regarded as the von Neumann Bottleneck?

79. When a subroutine is called, the address of the instruction following the CALL instructions stored in/on the

80. When Performing a looping operation, the instruction gets stored in the

81. Which Algorithm is better choice for pipelining?

82. Which cache miss does not occur in case of a fully associative cache ?

83. Which is the fastest storage unit in a usual memory hierarchy?

84. Which major development led to the production of microcomputers?

85. Which MIMD systems are best scalable with respect to the number of processors?

86. Which miss even occurs in infinite caches?

87. Which of the architecture is power efficient?

88. Which of the following bus is used to transfer data from main memory to peripheral device?

89. Which of the following code is used in present day computing was developed by IBM corporation?

90. Which of the following is true about interrupts?


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