Parallel Processing MCQ Multiple Choice Questions - Page 2 for Practice
31. In daisy-chaining priority method, all the devices that can request an interrupt are connected in
Correct Answer is: serial
32. In immediate addressing the operand is placed
Correct Answer is: after opcode in the instruction
33. Instruction pipelining has minimum stages
Correct Answer is: 2
34. Intel 8080 microprocessor has an instruction set of 91 instruction. The opcode to implement this instruction set should be at least
Correct Answer is: 7 bit long
35. Intel Pentium CPU is a
Correct Answer is: RISC based
36. Interrupts which are initiated by an instruction are
Correct Answer is: external
37. Itanium processor: Which hazard can be circumvented by register rotation?
Correct Answer is: Data hazards
38. Memory access in RISC architecture is limited to instructions
Correct Answer is: STA and LDA
39. Memory address refers to the successive memory words and the machine is called as
Correct Answer is: word addressable
40. Micro instructions are stored in
Correct Answer is: control memory
41. Out of the following which is not a CISC machine.
Correct Answer is: Motorola A567
42. Parallel processing may occur
Correct Answer is: both[A] and [B]
43. Parallel programs: Which speedup could be achieved according to Amdahls law for infinite number of processors if 5% of a program is sequential and the remaining part is ideally parallel?
Correct Answer is: 20
44. PC Program Counter is also called
Correct Answer is: instruction pointer
45. Pipeline implement
Correct Answer is: calculate operand
46. Pipe-lining is a unique feature of
Correct Answer is: RISC
47. Pipelining strategy is called implement
Correct Answer is: instruction prefetch
48. Processors of all computers, whether micro, mini or mainframe must have
Correct Answer is: All of above
49. SPEC stands for,
Correct Answer is: System Performance Evaluation Corporation.
50. Systems that do not have parallel processing capabilities are
Correct Answer is: SISD
51. Te devices connected to a microprocessor can use the data bus:
Correct Answer is: only when it’s sending or receiving data
52. The 16- bit registers in 8085 is
Correct Answer is: stack pointer and program counter
53. The access time of memory is ............... the time required for performing any single CPU operation.
Correct Answer is: Longer than
54. The advantage of RISC processor over CISC processor is that
Correct Answer is: An instruction can be executed in one cycle
55. The average number of steps taken to execute the set of instructions can be made to be less than one by following
Correct Answer is: Super-scaling
56. The CISC stands for
Correct Answer is: Complex Instruction set computer
57. The clock rate of the processor can be improved by,
Correct Answer is: All of the above
58. The computer architecture aimed at reducing the time of execution of instructions is
Correct Answer is: RISC
59. The concept of pipelining is most effective in improving performance if the tasks being performed in different stages :
Correct Answer is: require about the same amount of time
60. The cost of a parallel processing is primarily determined by :
