Parallel Processing MCQ Quiz - Multiple Choice Questions & Answers Page 2

11. In a system with a 16 bit address bus, what is the maximum number of 1K byte memory devices it could contain

1. 16
2. 64
3. 256
4. 65536

12. In CISC architecture most of the complex instructions are stored in

1. Register
2. Diodes
3. CMOS
4. Transistors

13. In daisy-chaining priority method, all the devices that can request an interrupt are connected in

1. parallel
2. serial
3. random
4. none of the above

14. In immediate addressing the operand is placed

1. in the CPU register
2. after opcode in the instruction
3. in the memory
4. in the stack

15. Instruction pipelining has minimum stages

1. 4
2. 2
3. 3
4. 6

16. Intel 8080 microprocessor has an instruction set of 91 instruction. The opcode to implement this instruction set should be at least

1. 3 bit long
2. 5 bit long
3. 7 bit long
4. 9 bit long

17. Intel Pentium CPU is a

1. RISC based
2. CISC based
3. Both of the above
4. None of the above

18. Interrupts which are initiated by an instruction are

1. internal
2. external
3. hardware
4. Software

19. Itanium processor: Which hazard can be circumvented by register rotation?

1. Control hazards
2. Data hazards
3. Structural hazards
4. None

20. Memory access in RISC architecture is limited to instructions

1. CALL and RET
2. PUSH and POP
3. STA and LDA
4. MOV and JMP