Central Processing Unit CPU MCQ Multiple Choice Questions - Page 2 for Practice

31. Register addressing mode is used for

32. Register Indirect addressing mode is used for

33. The addressing mode which makes use of in-direction pointers is

34. The addressing mode, where you directly specify the operand value is

35. The addressing mode/s, which uses the PC instead of a general purpose register is

36. The choice of addressing mode governs

37. The CISC stands for

38. The computer architecture aimed at reducing the time of execution of instructions is

39. The contention for the usage of a hardware device is called

40. The fetch and execution cycles are interleaved with the help of

41. The instruction “JUMP” belongs to

42. The instruction format register to register has a length of

43. The instructions can be categorized as

44. The instructions that transfer the control to some predefined address or the address specified in the instruction are called as

45. The instructions which after execution transfer control to the next instruction in the sequence are called

46. The periods of time when the unit is idle is called as

47. The pipelining process is also called as

48. The RISC processor has a more complicated design than CISC.

49. The situation wherein the data of operands are not available is called

50. The Sun micro systems processors usually follow............architecture.

51. To evaluate an expression using stack based instrcutions, expression is first converted into

52. To increase the speed of memory access in pipelining, we make use of

53. Two main types of branch instructions are

54. Which addressing mode is efficient

55. Which of the following is not a visible register?

56. zero address instruction also called as

57. Zero address instruction takes data from


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Multiple Choice Questions and Answers on Central Processing Unit CPU

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