Digital Electronics MCQ Multiple Choice Questions - Page 3 for Practice
Digital Electronics MCQ Questions for Practice
61. The output of a gated S-R flip-flop changes only if the:
Correct Answer is: control input data has changed
62. When both inputs of a J-K flip-flop cycle, the output will:
Correct Answer is: not change
63. What is the significance of the J and K terminals on the J-K flip-flop?
Correct Answer is: There is no known significance in their designations
64. How is a J-K flip-flop made to toggle?
Correct Answer is: J = 1, K = 1
65. A J-K flip-flop is in a "no change" condition when ________
Correct Answer is: J = 0, K = 0
66. A correct output is achieved from a master-slave J-K flip-flop only if its inputs are stable while the:
Correct Answer is: clock is HIGH
67. A J-K flip-flop with J = 1 and K = 1 has a 20 kHz clock input. The Q output is ________
Correct Answer is: a 10 kHz square wave
68. The toggle condition in a master-slave J-K flip-flop means that Q and will switch to their ________ state(s) at the ________
Correct Answer is: opposite, active clock edge
69. What is the significance of the J and K terminals on the J-K flip-flop?
Correct Answer is: The letters were chosen in honor of Jack Kilby, the inventory of the integrated circuit
70. On a J-K flip-flop, when is the flip-flop in a hold condition?
Correct Answer is: J = 0, K = 0
71. Two J-K flip-flops with their J-K inputs tied HIGH are cascaded to be used as counters. After four input clock pulses, the binary count is ________?
Correct Answer is: Please check the page for the answer.
