61. Which alteration is made in the manufacture of a TTL gate to create an open-collector output?
62. Which of the following are not characteristics of TTL logic gates?
63. Which of the following input levels would not be a valid HIGH for a TTL gate?
64. Which of the following is a concern when using CMOS type devices?
65. Which of the following is a special type of transistor used in the TTL series to improve speed characteristics?
66. When setting the voltage for an external device that must interface with an FPGA, you must change the value of
67. Which of the following digital IC logic families is most susceptible to static discharge?
68. Which of the following is not a common logic family used today?
69. Which of the following is not a solution to interface problems between CMOS and TTL?
70. Which of the following levels would not be a valid LOW for a TTL gate?
MCQ Multiple Choice Questions and Answers on VLSI Design
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