VLSI Design MCQ Questions and Answers Quiz

21. The difference between VOH and VIH voltages is known as

  1. input margin.
  2. noise margin.
  3. output differential.
  4. input level.

22. The input transistor (Q 1) of a TTL gate acts like

  1. a NAND gate.
  2. a NOR gate.
  3. an AND gate.
  4. an OR gate.

23. The input transistor on a TTL circuit is unusual in that it has

  1. multiple bases.
  2. no collector
  3. no base
  4. multiple emitters.

24. The lower transistor of a totem-pole output is OFF when the gate output is

  1. HIGH.
  2. malfunctioning.
  3. LOW.
  4. over driven.

25. The lower transistor of a totem-pole output is saturated when the gate output is

  1. HIGH.
  2. LOW.
  3. malfunctioning.
  4. over driven.

26. The major advantage of CMOS logic circuits over TTL is

  1. very low power consumption.
  2. the ability to produce several output voltage levels.
  3. lower propagation delay.
  4. much higher propagation delay.

27. The major advantage of TTL logic circuits over CMOS is

  1. lower propagation delay.
  2. the ability to output higher voltages.
  3. more modern design.
  4. very low power consumption.

28. The maximum current for a HIGH output on a standard TTL gate is

  1. -10 µA.
  2. -400 µA.
  3. -1 µA.
  4. -10 mA.

29. The maximum current for a LOW output on a standard TTL gate is

  1. 16 µA.
  2. 40 mA.
  3. 100 µA.
  4. 16 mA.

30. The maximum input voltage recognized as a LOW by a TTL gate is

  1. 2.4 V.
  2. 0.8 V.
  3. 0.0 V.
  4. 0.4 V.

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VLSI Design Question and Answer

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