Parallel Processing Multiple Choice Questions and Answers

21. Dynamic RAMs are best suited to

1. slow system
2. large system
3. one bit system
4. none of the above

22. For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution ?

1. ISA
2. ANSA
3. Super-scalar
4. All of the above

23. For a RS flip-flop constructed with NAND gates and input R=1 and s=1 the state is

1. Memory state
2. Set state
3. Reset state
4. Unused state

24. From where interrupts are generated?A

1. Central processing unitB
2. Memory chipsC
3. RegistersD
4. I/O devices

25. How does the number of transistors per chip increase according to Moores law?

1. Quadratically
2. Linearly
3. Cubicly
4. Exponentially

26. How many address lines are needed to address each memory location in a 2048X 4 memory chip?

1. 10
2. 11
3. 8
4. 12

27. How many bits do you think will be adequate to encode individual character in Devnagari script

1. 12
2. 16
3. 64
4. 10

28. In a single byte how many bits will be there?

1. 8
2. 16
3. 4
4. 32

29. In a system with a 16 bit address bus, what is the maximum number of 1K byte memory devices it could contain

1. 16
2. 64
3. 256
4. 65536

30. In CISC architecture most of the complex instructions are stored in

1. Register
2. Diodes
3. CMOS
4. Transistors