Digital Electronics MCQ Questions and Answers Quiz

41. The inputs/outputs of an analog multiplexer/demultiplexer are:

  1. Bidirectional
  2. Unidirectional
  3. Even parity
  4. Binary-coded decimal

42. One application of a digital multiplexer is to facilitate:

  1. Data generation
  2. Serial-to-parallel conversion
  3. Parity checking
  4. Data selector

43. How many select lines would be required for an 8-line-to-1-line multiplexer?

  1. 2
  2. 3
  3. 4
  4. 8

44. Which of the following is correct for a gated D-type flip-flop?

  1. The Q output is either SET or RESET as soon as the D input goes HIGH or LOW
  2. The output complement follows the input when enabled
  3. Only one of the inputs can be HIGH at a time
  4. The output toggles if one of the inputs is held HIGH

45. Which of the following describes the operation of a positive edge-triggered D-type flip-flop?

  1. If both inputs are HIGH, the output will toggle
  2. The output will follow the input on the leading edge of the clock
  3. When both inputs are LOW, an invalid state exists
  4. The input is toggled into the flip-flop on the leading edge of the clock and is passed to the output on the trailing edge of the clock

46. Which of the following is correct for a D latch?

  1. The output toggles if one of the inputs is held HIGH
  2. Q output follows the input D when the enable is HIGH
  3. Only one of the inputs can be HIGH at a time
  4. The output complement follows the input when enabled

47. A D flip-flop utilizing a PGT clock is in the CLEAR state. Which of the following input actions will cause it to change states?

  1. CLK = NGT, D = 0
  2. CLK = PGT, D = 0
  3. CLOCK NGT, D = 1
  4. CLOCK PGT, D = 1

48. A positive edge-triggered D flip-flop will store a 1 when ________

  1. the D input is HIGH and the clock transitions from HIGH to LOW
  2. the D input is HIGH and the clock transitions from LOW to HIGH
  3. the D input is HIGH and the clock is LOW
  4. the D input is HIGH and the clock is HIGH

49. If an input is activated by a signal transition, it is ________

  1. edge-triggered
  2. toggle triggered
  3. clock triggered
  4. noise triggered

50. A basic S-R flip-flop can be constructed by cross-coupling which basic logic gates?

  1. AND or OR gates
  2. XOR or XNOR gates
  3. NOR or NAND gates
  4. AND or NOR gates
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